Running one test on a discrete semiconductor and calling it qualified is like checking one tire pressure and declaring the car roadworthy. The device might pass forward voltage. It might pass leakage. It might even pass breakdown. But something else fails in the field, and you spend weeks debugging a problem that a proper test flow would have caught in the lab.
A comprehensive performance test flow is not a checklist. It is a sequence. The order matters because each test stresses the device in a way that affects the next one. Get the order wrong, and you generate data that contradicts itself. Get it right, and you build a complete picture of how the device behaves under every condition it will see in the field.
This article walks through the actual flow, the reasoning behind each step, and the mistakes that turn a good test plan into a waste of time.
Before you touch any instrument, you need to know what you are testing and what condition it is in. Skipping this step is the number one cause of mixed-up data and failed lots that should have passed.
Every device gets a lot number, a date code, and a package variant. Write all of it down before you start. A TO-220 from lot A and a TO-220 from lot B can have different thermal resistance even though they carry the same part number. If you mix them during testing, your data is meaningless.
Sort devices by lot first. Then by date code within the lot. Then by package if you have multiple variants. Label everything. Use a barcode or a QR code if your lab supports it. Do not rely on memory. Memory fails under pressure, and pressure is exactly when you need your data to be clean.
Check the physical condition of every device. Bent leads, cracked packages, discoloration, or moisture on the surface — any of these can shift your test results. A device with a hairline crack in the epoxy might pass every electrical test but fail thermal cycling two weeks later. Reject it now. Do not test it and hope for the best.
All instruments must be calibrated and within their calibration window. An oscilloscope that drifted 3% in gain since last calibration will give you switching times that are off by tens of nanoseconds. A source-measure unit with a shifted current reading will corrupt every leakage current measurement you take.
Turn on all equipment at least 30 minutes before testing. Thermal drift in precision instruments is real. A multimeter that reads 10.000V when cold might read 10.003V after warming up. That 3mV shift is negligible for most tests but fatal for threshold voltage measurements.
Verify your test fixtures. Check contact resistance on every socket. A socket that read 10mΩ last month might read 50mΩ today because the contacts oxidized. Measure it with a four-wire ohmmeter before every test session. If the contact resistance exceeds 5mΩ for power devices or 10mΩ for signal devices, clean or replace the fixture.
Static tests come first. Always. The reason is simple: static tests are gentle. They do not stress the device. If you run dynamic tests first and then run static tests, the dynamic stress can shift the static parameters, and your baseline is corrupted.
Start with forward voltage drop (Vf) for diodes and BJTs, or on-resistance (Rds(on)) for MOSFETs. Bias the device at the rated current and measure the voltage. For diodes, also measure reverse leakage (Ir) at the rated reverse voltage. For BJTs, measure current gain (hFE) at the rated collector current. For MOSFETs, measure threshold voltage (Vgs(th)) at the specified drain current.
These numbers are your reference point. Every other test you run later gets compared against these values. If Vf shifts after thermal testing, you know the device degraded. If hFE drops after voltage stress, you know the gain margin is thinner than the datasheet suggests.
Run each static parameter at three temperatures minimum: 25°C, 85°C, and 125°C. A single-temperature static test tells you almost nothing. The temperature coefficient of Vf is about -2mV/°C for silicon diodes. If you only test at 25°C, you have no idea what Vf looks like at 125°C, and that is where your circuit actually operates.
After forward and gain tests, move to breakdown. For diodes, measure reverse breakdown voltage (Vbr). For transistors, measure collector-emitter breakdown (BVces) or drain-source breakdown (BVdss). For thyristors, measure repetitive off-state voltage (Vdrm).
Use a current-limited supply. Set the current limit to the specified test current, typically 1mA to 100µA depending on the device. Ramp the voltage slowly at the rate specified by the applicable standard, typically 10V/s to 100V/s. Measure the voltage at which the current reaches the test current. That is your breakdown voltage.
Run this test at 25°C first. Then repeat at 125°C. Breakdown voltage has a positive temperature coefficient for most devices. A device that breaks down at 600V at 25°C might break down at 620V at 125°C. If your circuit operates at high temperature, you need to know the high-temperature value, not the room-temperature value.
Do not run this test on devices that have already been stressed by dynamic or thermal testing. Breakdown testing can destroy a weakened device. Always run it on fresh samples or on devices that have only seen static tests so far.
Static tests tell you where the device sits. Dynamic tests tell you how it moves. And movement is where most field failures live.
For diodes, measure reverse recovery time (trr) and reverse recovery charge (Qrr). For BJTs, measure storage time (ts) and turn-off time (toff). For MOSFETs and IGBTs, measure turn-on delay (td(on)), current rise time (tr), turn-off delay (td(off)), current fall time (tf), and voltage rise time (tv).
Use a test circuit that replicates the actual commutation conditions in your application. A simple resistive load does not replicate the inductive kick you see in a real converter. Use an inductive load with a freewheeling diode to get realistic current commutation waveforms.
Drive the gate or base with a pulse generator that has fast edges. A slow drive edge adds delay that is not part of the device. The standard drive rise time is typically less than 50ns for MOSFETs and less than 100ns for IGBTs. If your driver is slower than that, your switching times are measuring the driver, not the device.
Capture waveforms with an oscilloscope that has at least 5x the bandwidth of the fastest edge you expect to see. A 20ns switching time requires at least 100MHz bandwidth. A 5ns switching time requires 250MHz or better. Using a scope with insufficient bandwidth smears the edges and gives you switching times that are 20% to 30% too long.
Run dynamic tests at the same three temperatures used for static tests. Switching times get worse at high temperature. A MOSFET that turns off in 50ns at 25°C might take 80ns at 125°C. That 30ns difference changes your switching loss calculation and might push your thermal design over the edge.
Gate charge (Qg) determines how much drive current you need and how fast the device switches. It is not on the front page of the datasheet, but it is one of the most important parameters for driver design.
Measure gate charge using a capacitance bridge or a dedicated gate charge test system. Bias the drain-source voltage to the rated value. Apply a gate voltage ramp and measure the current. Integrate the current over time to get the charge. The total gate charge Qg, the gate-source charge Qgs, and the gate-drain charge Qgd each tell you something different about the device's switching behavior.
Qgs tells you how much charge you need to turn the device on. Qgd tells you how much charge you need to overcome the Miller plateau. The ratio of Qgd to Qg tells you how sensitive the device is to dv/dt during turn-off. A high Qgd means the device is prone to false turn-on from voltage transients.
Measure input capacitance (Ciss), output capacitance (Coss), and reverse transfer capacitance (Crss) at the rated voltage and at zero voltage. These values shift with voltage, and the shift affects your snubber design and your EMI performance.
A device that passes every electrical test but overheats in the field is still a failed device. Thermal testing is not optional. It is the test that tells you whether the device survives in your actual mounting conditions.
Mount the device on the heatsink you plan to use in production. Use the same thermal interface material. Apply power and wait for thermal equilibrium. Measure the case temperature and the ambient temperature. Calculate thermal resistance as the temperature rise divided by the applied power.
Do this at multiple power levels. Start at 25% of rated power, then 50%, then 75%, then 100%. Plot temperature rise versus power. The slope is your thermal resistance. If the plot curves upward at high power, the device is approaching thermal runaway, and your heatsink is undersized.
Run this test at your maximum ambient temperature. A device with Rth_jc of 1.5°C/W at 25°C ambient might have an effective Rth_ja of 4°C/W at 85°C ambient because the heatsink is less effective at higher ambient. Use the effective thermal resistance for your design, not the junction-to-case value from the datasheet.
Steady-state testing tells you the thermal resistance at DC. Transient testing tells you the thermal impedance for short pulses. This is critical for switching applications where the device sees short bursts of high power.
Use the electrical method to measure junction temperature directly. Calibrate the device first by measuring the temperature-sensitive parameter at two known temperatures. Then, during operation, measure the same parameter in real time and convert it to junction temperature using the calibration slope.
Apply a pulse train that matches your actual duty cycle. Measure the peak junction temperature at the end of the pulse train. If the peak Tj exceeds Tj_max, the device will fail. If the valley Tj does not cool enough between pulses, the average temperature will climb over time and cause thermal runaway.
Run this test at the worst-case ambient temperature and the worst-case duty cycle. Do not test at light load and assume the numbers scale. They do not scale linearly. A device that survives a 10% duty cycle at 25°C ambient might not survive a 50% duty cycle at 85°C ambient.
Electrical tests tell you whether the device works today. Reliability tests tell you whether it will work in six months.
Temperature cycling stresses the bond wires, the solder joints, and the interface between the die and the lead frame. A device that passes every electrical test can still fail after 500 cycles if the bond wire has a weak spot.
Cycle the device between the minimum and maximum operating temperatures. Use a ramp rate of 5°C/min to 10°C/min. Hold at each extreme for 15 to 30 minutes. Run at least 500 cycles for automotive qualification, 1000 cycles for industrial qualification.
After cycling, repeat the key electrical tests: forward voltage, leakage, breakdown, and switching times. Compare against the pre-stress values. Any shift beyond the datasheet tolerance is a failure.
Humidity exposure tests the package integrity. Moisture that gets under the epoxy can cause corrosion or popcorn cracking during solder reflow. Expose the device to 85% relative humidity at 85°C for 96 hours minimum. After exposure, repeat the electrical tests. A device that fails leakage after humidity exposure has a package defect that will cause field failures.
Electrostatic discharge can damage the gate oxide of a MOSFET or the junction of a BJT without leaving any visible mark. The device passes every test and then fails in the field because someone touched it without a wrist strap.
Test ESD robustness using an ESD simulator. Apply the specified discharge voltage to each pin combination. For MOSFETs, the gate is the most sensitive. A 2kV human body model discharge can puncture a thin gate oxide and shift Vgs(th) permanently.
Surge testing applies high-energy pulses to the power terminals. This simulates the voltage spikes that happen during load dump in automotive applications or inductive switching in industrial drives. A device that survives ESD but fails surge testing will not survive the real world.
Run ESD and surge tests on fresh devices, not on devices that have already been through thermal cycling. Prior stress can weaken the device and make it fail ESD at a lower voltage than it would have otherwise. You want to know the intrinsic ESD robustness, not the robustness of a pre-damaged device.
You have run all the tests. Now you have a stack of numbers. What do you do with them.
Every test report must include the device identification, the lot number, the test date, the ambient temperature, the instrument calibration dates, the raw data, and the pass/fail decision. Without lot traceability, a field failure cannot be correlated back to your test data.
Store the raw waveforms, not just the extracted numbers. A switching time of 45ns means nothing without the waveform that produced it. Someone will question that number six months from now, and the waveform settles the argument in seconds.
Use a database or a LIMS if your volume justifies it. For low-volume testing, a well-organized spreadsheet with file links to the raw data works fine. The key is consistency. Every sample gets the same set of fields. No exceptions.
The datasheet gives you limits. Use them. But add guard bands for production testing.
For characterization, use the datasheet limits directly. Record how close each device is to the limit. A device that measures 95% of the maximum breakdown voltage has 5% margin. A device that measures 99% has 1% margin. Both pass characterization, but only the first one is safe for production.
For production testing, set the fail limit at 80% to 90% of the datasheet maximum for critical parameters like breakdown voltage and holding current. For non-critical parameters like forward voltage, use 95% of the datasheet range. This gives you a guard band that catches process drift before it ships.
Do not tighten the limits too much. If you set the fail limit at 70% of the datasheet maximum, you will reject good devices and your yield will tank. If you set it at 95%, you will ship devices that fail in the field. Find the balance based on your process capability, not based on fear.
One sample per lot is not testing. It is gambling.
For production testing, five samples per lot is the minimum. Ten is better. Twenty-five gives you a statistical distribution you can actually trust.
For characterization, test at least twenty-five devices across multiple lots. Plot the distribution of every parameter. Look for bimodal distributions, which indicate two populations in the lot. Look for drifts over time, which indicate a process shift. Look for outliers, which indicate contamination or equipment issues.
The sample size is not a cost. It is an investment. Every device you test that fails catches a problem before it ships. Every device you test that passes gives you confidence in the lot. Skipping samples to save time is the most expensive decision you can make.
Running dynamic tests before static tests corrupts your baseline. Always static first, then dynamic, then thermal, then reliability.
Testing at only one temperature gives you a number that is almost useless. Three temperatures minimum. Five if your application spans a wide range.
Using the wrong test current for threshold measurements shifts Vgs(th) by hundreds of millivolts. Always match the test current to the operating current.
Ignoring the PCB in thermal testing gives you a thermal resistance that does not match your actual application. The test fixture must replicate the production layout.
Not preconditioning the device before breakdown testing gives you a breakdown voltage that is 5% to 10% off. Apply a forward pulse before every breakdown test.
The flow exists for a reason. Every step builds on the previous one. Every test condition is chosen to match the next test. Deviate from the flow, and your data stops telling a coherent story. Follow it, and you catch the failures that matter before they leave the building.
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