Specification for Dynamic Parameter Testing of Discrete Semiconductors

Discrete Semiconductor Dynamic Parameter Testing: Standards and Methods That Hold Up

Static parameters tell you if a device works. Dynamic parameters tell you how well it works, and more importantly, whether it will survive in your actual circuit. A MOSFET that passes every DC test can still destroy your converter if its reverse recovery charge is too high. A BJT that looks perfect on a multimeter can oscillate and burn out if its transition frequency is lower than you assumed.

Dynamic testing is where most engineers cut corners. They assume the datasheet numbers apply directly to their circuit. They rarely do. The test conditions in the datasheet and the conditions in your board are almost never the same. That gap is where failures hide.

What Counts as a Dynamic Parameter

Dynamic parameters are anything that changes with time. For discrete devices, the critical ones fall into three buckets: switching times, charge-related parameters, and frequency-dependent behavior.

Switching times include turn-on delay, rise time, turn-off delay, and fall time. These define how fast the device transitions between on and off states. Charge-related parameters include total gate charge Qg, reverse recovery charge Qrr, and storage time ts. These define how much charge moves during a transition. Frequency-dependent parameters include transition frequency fT, output capacitance Coss, and input capacitance Ciss. These define the speed ceiling of the device.

Every one of these numbers shifts with operating conditions. Voltage, current, temperature, and even the rise time of your gate drive all move the needle. A test method that does not control these variables produces numbers that look precise but are actually meaningless.

Switching Time Measurement Under Controlled Conditions

The Double-Pulse Test: Industry Standard for Power Devices

If you test only one dynamic parameter on a power MOSFET or IGBT, make it the switching loss using the double-pulse test. This method is codified in JEDEC JESD24-2 and is the reference that every datasheet switching specification is built on.

The setup uses a half-bridge with the device under test on the low side and a reference device on the high side. An inductive load sits between the switching node and the supply rail. The first pulse charges the inductor to the target current. The second pulse captures the switching event while the current is held constant by the inductance.

Why two pulses? Because the first pulse sets up the conditions, and the second pulse measures them. During the second pulse, the drain current is flat, the voltage transition is clean, and you can integrate VDS times ID to get the actual switching energy in nanojoules. No math tricks, no assumptions. You read the waveform and you get the number.

The gate drive matters enormously here. A weak driver with slow edges will stretch the switching times and inflate the loss numbers. The standard requires a gate resistance that produces a specific dV/dt on the gate, typically 10 to 50 volts per nanosecond depending on the device rating. If your driver cannot meet that, your test data is not comparable to any spec sheet.

Rise and Fall Time Definitions That Actually Matter

Rise time tr and fall time tf sound simple. They are not. The definition you use changes the number you get, and different standards use different definitions.

JEDEC defines tr as the time for VDS to fall from 90 percent to 10 percent of its off-state value during turn-on. IEC 60747-9 uses the same 10 to 90 percent window for power devices. But some automotive standards use 20 to 80 percent for gate voltage waveforms, because the 10 to 90 percent window on a fast edge includes too much noise from probe ringing.

The percentage window exists for a reason. The edges of a real switching waveform are not clean. They have overshoot, ringing, and noise. The 10 to 90 percent window excludes the messy parts and gives you a repeatable number. If you measure from 0 to 100 percent, your rise time will jump around by tens of nanoseconds every time you move the probe slightly.

Stick to one definition per test and document it. Mixing definitions between devices or between your test and the datasheet is the fastest way to generate fake failures.

Charge-Based Dynamic Parameters and How to Capture Them

Gate Charge Qg: More Than a Single Number

Total gate charge Qg is the integral of gate current over the entire switching cycle. It tells you how much charge your driver must supply every cycle, which directly determines driver power loss and switching speed.

But Qg is not one number. It breaks into three components. Qgs is the charge needed to reach the Miller plateau. Qgd is the charge needed to cross the Miller plateau, which is also called the Miller charge. Qg is the sum of all three.

The Miller charge Qgd is the one that kills you in high-frequency applications. It is the charge that must be moved while the drain voltage is transitioning, and during that window, the device is in its highest loss state. A device with low Qg but high Qgd will switch fast but burn hot. A device with high Qg but low Qgd will be slow but efficient. You need both numbers, not just the total.

The standard method to measure Qg uses a gate driver with controlled dV/dt and a current probe on the gate lead. You integrate the gate current waveform from the start of the pulse to the point where VGS reaches its final value. The test must be run at the same VDS and ID that the datasheet specifies, typically at rated voltage and a fraction of rated current.

Reverse Recovery Charge Qrr: The Silent Killer in Diode Circuits

Every diode has a reverse recovery problem. When you switch a diode from forward conduction to reverse blocking, the stored charge in the junction must be swept out before the diode can block voltage. During that sweep, a large reverse current flows, and that current overlaps with the reverse voltage, creating a spike of power dissipation.

Qrr is the total charge that flows during this reverse recovery event. It is measured using the same double-pulse setup as switching loss testing, but with the diode under test on the low side and the current set to the target forward current before the reverse pulse hits.

The standard defines two components. Qra is the charge removed during the initial fast recovery phase. Qrb is the charge removed during the slower tail phase. The ratio of Qra to Qrr tells you how snappy the recovery is. A device with most of its Qrr in Qrb has a long soft tail, which means more loss and more EMI. A device with most of its Qrr in Qra recovers fast and stays clean.

For Schottky diodes, Qrr is essentially zero, which is why they dominate in high-frequency converters. For fast recovery diodes, Qrr is in the tens of nanocoulombs. For standard rectifiers, it can be hundreds of nanocoulombs. The number you measure depends entirely on the forward current, the di/dt during turn-off, and the junction temperature.

Frequency-Dependent Parameters and Their Test Methods

Transition Frequency fT and Maximum Oscillation Frequency fmax

fT is the frequency at which the current gain of a BJT drops to unity. fmax is the frequency at which the power gain drops to unity. These two numbers define the speed ceiling of the device.

The standard method to measure fT uses a network analyzer or a signal generator with a spectrum analyzer. You bias the device at a specified collector current and VCE, inject a small signal at the base, and measure the current gain versus frequency. The frequency where the gain crosses 0 dB is fT.

For production testing, this method is too slow. The faster alternative uses a pulse generator and an oscilloscope. You inject a fast current pulse into the base and measure the collector current response. The rise time of the collector current gives you fT approximately, since fT is roughly 0.35 divided by the rise time.

This approximation works for devices up to a few gigahertz. that, parasitic inductance and capacitance in the test fixture dominate the measurement, and you need a proper network analyzer setup with de-embedding to get real numbers.

Capacitance Measurement Under Bias

Ciss, Coss, and Crss are not constants. They change with the voltage across the terminals. A MOSFET might have Ciss of 3 nanofarads at zero volts drain-source voltage, but that number can drop to 1.5 nanofarads at half the rated voltage.

The standard method to measure these capacitances uses an LCR meter with a DC bias source. You apply the specified DC voltage between drain and source, then superimpose a small AC signal and measure the impedance. From the impedance, you extract Ciss, Coss, and Crss at that specific bias point.

JEDEC JESD28-B specifies the test frequencies, signal levels, and bias conditions. The signal level must be small enough that it does not modulate the junction capacitance — typically 10 to 30 millivolts RMS. If your signal is too large, you are measuring a nonlinear capacitance, and the number will not match the datasheet.

For switching loss calculations, the relevant capacitance is not Ciss or Coss alone. It is the effective input capacitance during the Miller plateau, which is dominated by Crss. This is why two MOSFETs with the same Qg can have very different switching losses if their Crss values differ.

Test Fixture Design: The Part That Makes or Breaks Your Data

Parasitic Inductance Is Your Worst Enemy

At switching speeds below 100 nanoseconds, the inductance of your test fixture starts to matter more than the device itself. A 10 nanohenry loop inductance with a 50 ampere di/dt creates a 0.5 volt spike. That spike rings on the waveform, distorts the switching edges, and makes your rise time measurement 20 to 30 nanoseconds longer than reality.

The fix is to minimize the loop area. Keep the gate drive loop as tight as possible. Use a ground plane directly under the device. Place the current sense resistor as close to the source pin as you can physically get it. Every centimeter of trace adds roughly 1 to 2 nanohenries of inductance, and at 50 amps per microsecond, that adds up fast.

Kelvin connections on the source lead are mandatory for any switching loss test. If you measure the source voltage through the same path that carries the switching current, the inductive spike on that path gets added to your VDS reading, and your loss calculation is completely wrong.

Probe Selection and Bandwidth Matching

A 50 megahertz probe on a 20 nanosecond edge gives you garbage. The rule is simple: probe bandwidth should be at least five times the highest frequency component in your signal. For a 20 nanosecond rise time, the frequency content goes up to roughly 175 megahertz. You need a probe with at least 500 megahertz bandwidth, preferably 1 gigahertz.

Voltage probes with long ground leads are a disaster on fast edges. The ground lead inductance rings with the probe capacitance and creates false oscillations that look exactly like real ringing. Use a probe with a ground spring or a very short ground clip. The difference between a 5 centimeter ground lead and a 5 millimeter ground spring is the difference between clean data and a failed test report.

Current probes need bandwidth too. A Rogowski coil with 100 megahertz bandwidth will miss the fast di/dt spikes that determine switching loss. For power device testing, a current transformer with 200 megahertz or higher bandwidth is the minimum.

Temperature Dependence of Dynamic Parameters

Every dynamic parameter shifts with temperature, and the shift is not always in the direction you expect.

Switching times get longer at high temperature for MOSFETs because the channel mobility drops. A device that turns on in 20 nanoseconds at 25 degrees might take 40 nanoseconds at 125 degrees. For IGBTs, the tail current during turn-off gets longer at high temperature, which increases turn-off loss dramatically.

Reverse recovery charge Qrr increases with temperature for most diodes. The stored charge builds up faster at higher junction temperatures, and the sweep-out time gets longer. A diode that recovers in 50 nanoseconds at 25 degrees might take 100 nanoseconds at 100 degrees.

Gate charge Qg also shifts with temperature, though the effect is smaller than on switching times. The threshold voltage drops at high temperature, which means the driver spends more time in the Miller plateau region, effectively increasing the switching time even if Qg stays roughly constant.

The only way to get meaningful dynamic parameter data is to test at the temperature that matches your application. Room temperature data is useful for sorting and binning, but it tells you almost nothing about how the device will behave at 100 degrees junction temperature in your actual converter.

Production Testing vs Characterization Testing

Production testing and characterization testing serve different purposes, and they use different methods.

Production testing needs speed and repeatability. You use hardwired test fixtures, fixed bias conditions, and pass/fail limits derived from the datasheet min/max values. The goal is to sort good parts from bad parts, not to generate a complete data set. Switching time and gate charge are the most common production dynamic tests because they correlate well with field performance and they are fast to measure.

Characterization testing needs accuracy and completeness. You use a curve tracer or a parameter analyzer, sweep voltage and current over the full operating range, and record every parameter at every point. The goal is to understand the device well enough to simulate it in your design tool. This takes hours per device, not seconds.

Do not confuse the two. A production test that passes does not guarantee the device will work in your circuit. A characterization data set that looks perfect does not guarantee the device will survive production assembly. Each test answers a different question, and you need both answers before you ship a design.